File:Digital Acquisition Board - HERALD Design Manual.pdf

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Digital_Acquisition_Board_-_HERALD_Design_Manual.pdf(file size: 2.51 MB, MIME type: application/pdf)

File history

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Date/TimeDimensionsUserComment
current20:13, 18 November 2014 (2.51 MB)JoeGreenberg (Talk | contribs) (Incorporate latest test results. Include section on changes for next board. Include section on unresolved problems )
17:41, 3 November 2014 (1.89 MB)JoeGreenberg (Talk | contribs)
18:07, 19 May 2014 (1.57 MB)JoeGreenberg (Talk | contribs)
18:55, 10 February 2014 (715 KB)JoeGreenberg (Talk | contribs)
15:57, 13 January 2014 (636 KB)JoeGreenberg (Talk | contribs) (Add section to Design Manual incorporating the Comments from Schematic Reviewers and the actions taken based on those comments.)
20:22, 3 December 2013 (740 KB)RichLacasse (Talk | contribs) (Add new info in several sections. Change the name from SNAP to HERALD)
14:46, 23 September 2013 (631 KB)JoeGreenberg (Talk | contribs) (Add Section 4.4 on the FPGA Design. )
17:31, 10 September 2013 (1.06 MB)RichLacasse (Talk | contribs) (Added sections on Xilinx design and synthesizer design)
20:31, 28 August 2013 (688 KB)RichLacasse (Talk | contribs) (Added some discussion of the ADC and Clock distribution circuits. Added schematics of ADC and Clk Generator)
12:59, 14 August 2013 (124 KB)RichLacasse (Talk | contribs) (Added sections about ADC and clock driver)
20:44, 13 August 2013 (88 KB)Ddeboer (Talk | contribs)

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